1. Technical Field
The present invention is directed to the field of microprocessors and more particularly to a microprocessor including a performance monitor unit that includes an event register for storing the current event signal values of a set of event signals where the set of signals are captured and stored in the event registers as one unit that represents the full event state of the processor.
2. Description of Related Art
In typical computer systems utilizing processors, system developers desire optimization of execution software for more effective system design. Usually, studies of a program's access patterns to memory and interaction with a system's memory hierarchy are performed to determine system efficiency. Understanding the memory hierarchy behavior aids in developing algorithms that schedule and/or partition tasks, as well as distribute and structure data for optimizing the system.
Performance monitoring is often used in optimizing the use of software in a system. A performance monitor is generally regarded as a facility incorporated into a processor to monitor selected characteristics to assist in the debugging and analyzing of systems by determining a machine's state at a particular point in time. Often, the performance monitor produces information relating to the utilization of a processor's instruction execution and storage control. For example, the performance monitor can be utilized to provide information regarding the amount of time that has passed between events in a processing system. The performance monitor can also be used to provide counts of the number of occurrences of selected events in a processing system. The information produced usually guides system architects toward ways of enhancing performance of a given system or of developing improvements in the design of a new system.
Most modern microprocessors contain built-in hardware for performance monitoring. Typically, a small number of counters, such as between two and eight counters, are implemented in the performance monitor. Each one of these counters can count a single event from a single event signal. The number of provided counters, however, is never sufficient to fully explore the full event state of the processor.
The full event state of the processor includes multiple different event signals. For example, 32 or more signals, which is the full event state of the processor, may be received by a performance monitor which must then select between two and eight signals out of the possible 32 or more signals to count. Therefore, the performance analyst must make multiple runs collecting a different subset of the total signals during each run in order to collect the full set of signals.
In addition, the counters provide only a raw number of counts. The raw number is the number of times a particular event occurred on a particular event signal. The counters do not provide an indication of the concurrence of events, that is, how often a set of events happened together during the same clock cycle.
Therefore, a need exists for an event register that stores the current event signal values of a set of event signals where the set of signals are captured and stored in the event registers as one unit that represents the full event state of the processor.